Novel Method to Speed-Up Power Module Optimisation using Geometrical Rule Checking of Electrical and Thermal Parameter

Full automatic power module design optimisation requires novel methods to reduce the time and resources required for highly intensive computational tasks. Tasks such as simulating electrical parasitics and temperatures limit the number of experiments in a given timeframe. With this, the design space cannot be fully explored to find an optimal design. The paper describes how new rules can be developed and applied based on geometrical relations to electrical and thermal parameters. These rules are used as pre-filters for the full automatic optimisation or as pre-checks to determine if a design template can be optimised. A power module with parallel Silicon Carbide metal oxide semiconductor field-effect transistors sharing a common source path was used for this. The geometrical loop matrix was extracted and analysed as an example of such a rule. This matrix enables the analysis of shared copper percentage and the design symmetry of the parallel switching devices. The paper's results significantly improve the optimisation speed by filtering infeasible designs from eight to four hours. The novel method described in this paper is adaptable to other designs, enhancing the overall efficiency of the power module design and verification process.